rezso/HDL

Project ID: 46761

Build 3520593

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-02-17 00:48 UTC (9 months ago)
Started:
2022-02-17 00:50 UTC (9 months ago)
Finished:
2022-02-17 01:05 UTC (9 months ago)
Build time:
14 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220214.0.git96a1cbf7
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220214.0.git96a1cbf7.src.rpm