rezso/HDL

Project ID: 46761

Build 3851405

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-03-26 01:01 UTC (8 months ago)
Started:
2022-03-26 01:02 UTC (8 months ago)
Finished:
2022-03-26 01:17 UTC (8 months ago)
Build time:
14 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220325.0.git673b0d30
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220325.0.git673b0d30.src.rpm