rezso/HDL

Project ID: 46761

Build 4349998

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-04-30 01:25 UTC (7 months ago)
Started:
2022-04-30 01:56 UTC (7 months ago)
Finished:
2022-04-30 02:29 UTC (7 months ago)
Build time:
32 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220423.0.gite7b700f4
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220423.0.gite7b700f4.src.rpm