rezso/HDL

Project ID: 46761

Build 4377126

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-05-08 01:13 UTC (1 year, 11 months ago)
Started:
2022-05-08 01:14 UTC (1 year, 11 months ago)
Finished:
2022-05-08 01:34 UTC (1 year, 11 months ago)
Build time:
20 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220501.0.git0a86773c
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220501.0.git0a86773c.src.rpm