rezso/HDL

Project ID: 46761

Build 4553382

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-06-22 01:27 UTC (1 year, 9 months ago)
Started:
2022-06-22 01:28 UTC (1 year, 9 months ago)
Finished:
2022-06-22 01:44 UTC (1 year, 9 months ago)
Build time:
16 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220618.0.git93397e72
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220618.0.git93397e72.src.rpm