rezso/HDL

Project ID: 46761

Build 4587331

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-06-30 01:20 UTC (5 months ago)
Started:
2022-06-30 01:21 UTC (5 months ago)
Finished:
2022-06-30 01:35 UTC (5 months ago)
Build time:
14 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220628.0.gitc7cb13d3
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220628.0.gitc7cb13d3.src.rpm