rezso/HDL

Project ID: 46761

Build 7939604

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-08-24 00:59 UTC (24 days ago)
Started:
2024-08-24 01:00 UTC (24 days ago)
Finished:
2024-08-24 01:08 UTC (24 days ago)
Build time:
7 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20240816.0.git8c56b2d1
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20240816.0.git8c56b2d1.src.rpm