rezso/HDL

Project ID: 46761

Build 8128078

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-10-11 01:07 UTC (17 days ago)
Started:
2024-10-11 01:08 UTC (17 days ago)
Finished:
2024-10-11 01:16 UTC (17 days ago)
Build time:
8 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20241009.0.gitd8c3c51a
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20241009.0.gitd8c3c51a.src.rpm