rezso/HDL

Project ID: 46761

Build 8278602

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-11-19 01:12 UTC (3 days ago)
Started:
2024-11-19 01:13 UTC (3 days ago)
Finished:
2024-11-19 01:21 UTC (3 days ago)
Build time:
7 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20241115.0.git62727e8b
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20241115.0.git62727e8b.src.rpm