rezso/HDL

Project ID: 46761

Build 8370729

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-12-10 00:53 UTC (12 days ago)
Started:
2024-12-10 00:54 UTC (12 days ago)
Finished:
2024-12-10 01:01 UTC (12 days ago)
Build time:
7 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20241209.0.git06077ed0
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20241209.0.git06077ed0.src.rpm