rezso/HDL

Project ID: 46761

Build 8532971

General Information

Status:
succeeded - Successfully built.
Submitted:
2025-01-18 11:33 UTC (9 days ago)
Started:
2025-01-18 11:36 UTC (9 days ago)
Finished:
2025-01-18 11:47 UTC (9 days ago)
Build time:
11 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20250115.0.git14375567
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20250115.0.git14375567.src.rpm