rezso/HDL

Project ID: 46761

Build 8825073

General Information

Status:
succeeded - Successfully built.
Submitted:
2025-03-27 00:52 UTC (3 days ago)
Started:
2025-03-27 00:53 UTC (3 days ago)
Finished:
2025-03-27 00:54 UTC (3 days ago)
Build time:
a minute
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
litex-pythondata-cpu-cva5
Version:
2024.12-20250326.0.git146e2443
Source Type:
SRPM or .spec file upload
File Name:
litex-pythondata-cpu-cva5-2024.12-20250326.0.git146e2443.fc41.src.rpm