rezso/HDL

Project ID: 46761

Build 9418271

General Information

Status:
succeeded - Successfully built.
Submitted:
2025-08-15 01:19 UTC (15 days ago)
Started:
2025-08-15 01:19 UTC (15 days ago)
Finished:
2025-08-15 01:27 UTC (15 days ago)
Build time:
8 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20250803.0.gitdad78d52
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20250803.0.gitdad78d52.src.rpm