rezso/HDL

Project ID: 46761

Build 9683158

General Information

Status:
succeeded - Successfully built.
Submitted:
2025-10-13 01:14 UTC (5 days ago)
Started:
2025-10-13 01:15 UTC (5 days ago)
Finished:
2025-10-13 01:25 UTC (5 days ago)
Build time:
9 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20251012.0.gitfcb543d6
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20251012.0.gitfcb543d6.src.rpm