rezso/VLSI

Project ID: 47112

Build 3193023

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-01-18 10:37 UTC (2 years ago)
Started:
2022-01-18 10:38 UTC (2 years ago)
Finished:
2022-01-18 15:11 UTC (2 years ago)
Build time:
4 hours
Build timeout:
1 day, 23 hours and 50 minutes
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
klayout
Version:
0.27.7-20220117.0.gita470ee54
Source Type:
SRPM or .spec file upload
File Name:
klayout-0.27.7-20220117.0.gita470ee54.src.rpm