rezso/VLSI

Project ID: 47112

Build 4423686

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-05-19 01:32 UTC (2 years ago)
Started:
2022-05-19 01:41 UTC (2 years ago)
Finished:
2022-05-19 01:58 UTC (2 years ago)
Build time:
16 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
openlane
Version:
2022.05.18.02.12.32-20220517.0.git0dc6fb79
Source Type:
SRPM or .spec file upload
File Name:
openlane-2022.05.18.02.12.32-20220517.0.git0dc6fb79.src.rpm