rezso/VLSI

Project ID: 47112

Build 8111024

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-10-06 01:14 UTC (4 months ago)
Started:
2024-10-06 01:14 UTC (4 months ago)
Finished:
2024-10-06 01:19 UTC (4 months ago)
Build time:
5 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
netgen
Version:
1.5.281-20241003.0.git5c21000a
Source Type:
SRPM or .spec file upload
File Name:
netgen-1.5.281-20241003.0.git5c21000a.src.rpm