rezso/VLSI

Project ID: 47112

Build 4166072

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-04-10 22:09 UTC (1 year, 5 months ago)
Started:
2022-04-10 22:10 UTC (1 year, 5 months ago)
Finished:
2022-04-10 23:39 UTC (1 year, 5 months ago)
Build time:
an hour
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
openroad
Version:
2.0-20220409.1.gita1cd122f
Source Type:
SRPM or .spec file upload
File Name:
openroad-2.0-20220409.1.gita1cd122f.src.rpm