rezso/VLSI

Project ID: 47112

Build 4493131

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-06-04 01:12 UTC (1 year, 10 months ago)
Started:
2022-06-04 02:05 UTC (1 year, 10 months ago)
Finished:
2022-06-04 02:51 UTC (1 year, 10 months ago)
Build time:
46 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
openlane
Version:
2022.06.02.01.56.32-20220602.0.git01e95109
Source Type:
SRPM or .spec file upload
File Name:
openlane-2022.06.02.01.56.32-20220602.0.git01e95109.src.rpm