rezso/VLSI

Project ID: 47112

Build 4565469

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-06-27 01:29 UTC (1 year, 9 months ago)
Started:
2022-06-27 01:30 UTC (1 year, 9 months ago)
Finished:
2022-06-27 01:41 UTC (1 year, 9 months ago)
Build time:
10 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
netgen
Version:
1.5.224-20220626.0.gita795981e
Source Type:
SRPM or .spec file upload
File Name:
netgen-1.5.224-20220626.0.gita795981e.src.rpm