rezso/VLSI

Project ID: 47112

Build 4591872

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-07-03 01:42 UTC (1 year, 10 months ago)
Started:
2022-07-03 01:43 UTC (1 year, 10 months ago)
Finished:
2022-07-03 04:04 UTC (1 year, 10 months ago)
Build time:
2 hours
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
openroad
Version:
2.0-20220702.0.gitef5421b4
Source Type:
SRPM or .spec file upload
File Name:
openroad-2.0-20220702.0.gitef5421b4.src.rpm