rezso/VLSI

Project ID: 47112

Build 4687221

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-07-27 01:43 UTC (1 year, 8 months ago)
Started:
2022-07-27 07:09 UTC (1 year, 8 months ago)
Finished:
2022-07-27 10:26 UTC (1 year, 8 months ago)
Build time:
3 hours
Build timeout:
2 days
Networking enabled:
True
Directory:
VLSI
Built by:
rezso

Source

Package:
circuit-training
Version:
0-20220725.0.git95371f2f
Source Type:
SRPM or .spec file upload
File Name:
circuit-training-0-20220725.0.git95371f2f.src.rpm