rezso/HDL

Project ID: 46761

Build 3189176

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-01-16 00:54 UTC (2 years ago)
Started:
2022-01-16 00:56 UTC (2 years ago)
Finished:
2022-01-16 01:10 UTC (2 years ago)
Build time:
14 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220115.0.git6222a84d
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220115.0.git6222a84d.src.rpm