rezso/HDL

Project ID: 46761

Build 3738582

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-03-18 01:14 UTC (8 months ago)
Started:
2022-03-18 01:15 UTC (8 months ago)
Finished:
2022-03-18 01:30 UTC (8 months ago)
Build time:
14 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220316.0.git59b3e220
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220316.0.git59b3e220.src.rpm