rezso/HDL

Project ID: 46761

Build 4502428

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-06-07 01:13 UTC (6 months ago)
Started:
2022-06-07 01:14 UTC (6 months ago)
Finished:
2022-06-07 01:34 UTC (6 months ago)
Build time:
20 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220605.0.gite5abd4bf
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220605.0.gite5abd4bf.src.rpm