rezso/HDL

Project ID: 46761

Build 4530770

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-06-14 01:42 UTC (1 year, 10 months ago)
Started:
2022-06-14 01:43 UTC (1 year, 10 months ago)
Finished:
2022-06-14 02:19 UTC (1 year, 10 months ago)
Build time:
35 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220607.0.git2693dd32
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220607.0.git2693dd32.src.rpm