rezso/HDL

Project ID: 46761

Build 4631197

General Information

Status:
succeeded - Successfully built.
Submitted:
2022-07-13 01:25 UTC (4 months ago)
Started:
2022-07-13 01:26 UTC (4 months ago)
Finished:
2022-07-13 01:43 UTC (4 months ago)
Build time:
17 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
11.0-20220708.0.gite3a95919
Source Type:
SRPM or .spec file upload
File Name:
iverilog-11.0-20220708.0.gite3a95919.src.rpm