rezso/HDL

Project ID: 46761

Build 6027401

General Information

Status:
succeeded - Successfully built.
Submitted:
2023-06-09 01:49 UTC (1 year, 1 month ago)
Started:
2023-06-09 01:50 UTC (1 year, 1 month ago)
Finished:
2023-06-09 01:59 UTC (1 year, 1 month ago)
Build time:
9 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20230604.0.gitc74048a5
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20230604.0.gitc74048a5.src.rpm