rezso/HDL

Project ID: 46761

Build 7613750

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-06-14 00:57 UTC (a month ago)
Started:
2024-06-14 00:57 UTC (a month ago)
Finished:
2024-06-14 01:09 UTC (a month ago)
Build time:
12 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20240613.0.git8ac44a38
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20240613.0.git8ac44a38.src.rpm