rezso/HDL

Project ID: 46761

Build 7649797

General Information

Status:
succeeded - Successfully built.
Submitted:
2024-06-22 00:56 UTC (23 days ago)
Started:
2024-06-22 00:57 UTC (23 days ago)
Finished:
2024-06-22 01:09 UTC (23 days ago)
Build time:
11 minutes
Build timeout:
2 days
Networking enabled:
True
Directory:
HDL
Built by:
rezso

Source

Package:
iverilog
Version:
13.0-20240617.0.gitdc6f9f20
Source Type:
SRPM or .spec file upload
File Name:
iverilog-13.0-20240617.0.gitdc6f9f20.src.rpm