rezso/HDL

Project ID: 46761

Package: fpga-interchange-schema

General Information

Dist Git Repo:: rezso/HDL/fpga-interchange-schema

Default Build Source

Source Type:: No default source

Build ID	Package Version	Submitted	Build Time	Status
3120203	0.0-20211011.0.git53e3feda.fc36	2 years ago	5 minutes	succeeded
3458726	0.0-20220211.0.git3b27223f	2 years ago	5 minutes	succeeded
3891183	0.0-20220221.0.git9a48ae4d	2 years ago	6 minutes	succeeded
4417438	0.0-20220516.0.giteb2841ef	1 year, 11 months ago	20 minutes	succeeded
4457329	0.0-20220516.1.giteb2841ef	1 year, 10 months ago	4 minutes	succeeded
4597374	0.0-20220704.0.gitc985b464	1 year, 9 months ago	7 minutes	succeeded
4693102	0.0-20220704.1.gitc985b464	1 year, 8 months ago	4 minutes	succeeded
5080998	0.0-20220704.2.gitc985b464	1 year, 4 months ago	5 minutes	succeeded
6123648	0.0-20220704.3.gitc985b464	9 months ago	6 minutes	succeeded
6446244	0.0-20220704.4.gitc985b464	6 months ago	5 minutes	succeeded

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